Computer systems used in the field of aerospace have to fulfill three criteria: they must be low in weight, low in energy consumption and highly reliable, year after year. But ask the standard types of microprocessor systems used in aerospace to make fast calculations and they quickly meet their match. To solve this problem, the Steinbeis Transfer Center Aerospace in Gäufelden produces a computer system that does away with microprocessors and uses instead field programmable gate arrays, or FGPAs. The technology is being used by the European Space Agency for the ACES Project (Atomic Clock Ensemble in Space).
FPGAs are freely programmable logic devices which allow you to control processes as logic functions in hardware. Modern FPGAs make it possible to build systems as powerful as modern computer systems although in certain areas they are far superior in terms of performance. They greatly reduce mass and energy consumption compared to traditional microprocessor systems.
Normally FPGAs are programmed in hardware description languages such as VHDL or Verilog. These languages work on register levels, comparable with Assembler when programming microprocessors. Implementing complex algorithms is correspondingly long-winded. The developers at the Transfer Center Aerospace use Handel-C to program the FPGAs. Now available commercially, Handel-C was developed at Oxford University and is a high level language which describes hardware with C-syntax. Compared to classic C, it provides additional language components matched to the specific capabilities of the FPGAs. This makes it possible to achieve huge parallelism, complex algorithms and dedicated switches on the gate level without having to do away with software techniques, as is common with high level languages.
A compiler translates the algorithms into a standardized network list which, using tools from the FPGA manufacturer, is eventually processed into the bit sequence loaded onto the FPGA. In contrast to ASICS (application specific integrated circuits), an FPGA can be overwritten with new algorithms as often as you want. Loading is extremely quick and can even be carried out while the system is in use, reducing restarts and reconfiguration time to milliseconds. With hardware-based systems, doing away with layouts, masks and other production stages reduces the time taken between product development and market readiness to several months or even weeks.
As programs using FPGAs are not controlled by microprocessor systems in the software but by fixed processes in the hardware, all algorithms are worked through in synchrony with the clock of the FPGA. Within any one cycle complex operations can be carried out such as multiplications and additions. Speeds can be improved 40 to 100-fold compared to microprocessors. Dozens of input and output lines on the chip make it possible to create direct interfaces and buses to other systems – without additional controllers – which can be used simultaneously without delay. FPGAs are therefore ideal for high intensity computational requirements in real time and boast the versatility to work in a variety of hardware environments. Because of the large number of libraries, external hardware such as DDR RAM, ADC/DAC, mice and keyboards can be controlled from the FPGA. FPGAs contain embedded block RAM storage making it possible to run applications with high storage requirements such as video and audio coding.
The ACES project (Atomic Clock Ensemble in Space) allowed the Steinbeis experts in Gaufelden to demonstrate the current capabilities of high level language technology and FPGAs. ACES is a scientific mission at the European Space Agency destined to be mounted on the external experimental platform on the Columbus module on the International Space Station (ISS). The aim of ACES is to provide a highly precise 100MHz frequency standard for scientific experiments. To do this the system pairs the long-term stability of a laser-cooled cesium clock (PHARAO) with the short-term stability of an SHM (space hydrogen maser). As there is no gravitational pull in space, these clocks are ten times more precise than on earth, making it possible to compare frequency standards on a fixed object in space and on earth.
As part of the ACES project, the Aerospace Transfer Center developed the complex control and measurement algorithms for the Frequency Comparison and Distribution Package (FCDP). In the FCDP frequency and phase values are detected coming from the signals supplied by the atomic clocks. These are used to measure and regulate atomic clocks. The conventional approach using microprocessors and software would not have met the tight mass and energy restrictions so the Steinbeis team provided a convincing alternative with a direct hardware solution. The algorithms calculate the instantaneous phase and frequency value in real time, as well as the spectrum of phase noise via an FFT. Together with the system telemetry data which are captured in parallel, they are processed in preparation for scientific evaluation and transmitted via a telemetry and telecommand channel to the ISS on-board computer system. Even while the system is running, this interfaced can be used by the system for reconfigurations stipulated by the scientists.
Using higher level language to program the FPGA made it possible to provide a highly complex system such as the FCDP module directly within an FPGA without compromising software flexibility or exceeding crucial mass and energy requirements.
Dr. Felix Huber
Steinbeis Transfer Center Aerospace (Gäufelden)
stz103@stw.de